MRA4 Modbus HighPROTEC. Data point list. Manual DOK-TD-MRA4MDE
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1 MRA4 Modbus HighPROTEC Data point list Manual DOK-TD-MRA4MDE
2 Table of Contents Table of Contents TABLE OF CONTENTS... 2 MODBUS PARAMETERS... 3 Notes for the SCADA-System... 4 SPECIFIC MODBUS FUNCTION CODES... 5 Setting Date and Time Supported MODBUS- Error Messages APPENDIX - DATA POINT LISTS Signals Measuring values Commands Settings Cause of trip md5_1 md5_2 RMS_Handoff: Datei:? This Manual is valid for version (applies for Modbus RTU and Modbus TCP): Version 3.4.a Build: Page 2 EN MRA4 Modbus 09/17
3 Modbus Parameters Modbus Parameters For the Modbus Protocol several parameters have to be set which are relevant for the communication between the control system (SCADA) and the device. The parameters and their setting possibilities or value ranges are shown in the table below. ATTENTION! The Parameters are described within the appendix of the device manual (chapter Modbus). EN MRA4 Modbus 09/17 Page 3
4 Modbus Parameters Notes for the SCADA-System When using Modbus RTU the following times have to be considered by the control system and are fixed within the device : The dwell times (t D ) before start of a telegram must at least be set to 3.5 characters. Examples: 3.5 characters 9600 Baud = 4 ms 3.5 characters Baud = 2 ms characters Baud = 1 ms Start of a new telegram is expected when the dwell time (t D ) is > 3.5 characters. The fact that the probability of disruptions during transmission of a telegram increases with its length has to be taken into duly consideration and thus a query to the Slave should be possibly such that the response telegram is not much longer than 32 Byte. Page 4 EN MRA4 Modbus 09/17
5 Specific Modbus Function Codes Specific Modbus Function Codes For reading out data from the device or to carry out commands, the services listed in the table, also called»function Codes«, are supported. Functioncode Designation 3 Read Holding There are single or several data words read as from a specific data word address. Only status addresses and parameter addresses can be read. 4 Read Input There are single or several data words read as from a specific data word address. Only measuring values can be read. 5 Write single Output (Bit) All other values are illegal and will not affect the output. Via this function code acknowledgments can be executed as well as counters reseted or blockings set. 8 Loopback Test Test function for the communication system 16 Load Multiple There are single or several data words written as from a specific data word address. Table 3.1: function codes EN MRA4 Modbus 09/17 Page 5
6 Specific Modbus Function Codes On the following pages the Modbus functions are described in detail: Function-Code 3/4: Query Slave address 3/4 Register address HI Register address LO Register number HI Register number LO Check-sum HI Check-sum LO Response Slave address 3/4 Byte number Register 0 HI Register 0 LO... Check-sum HI Check-sum LO Register address (HI*256 + LO) The data word address from where reading should start. Register number (HI*256 + LO) Number of data words to be read. Valid range: Byte number Number of subsequent Bytes containing data words. Register Data words read out of the device (Highbyte and Lowbyte). Page 6 EN MRA4 Modbus 09/17
7 Specific Modbus Function Codes Float Values IEEE 754 For displaying a float value, it is important to save received bytes in a correct order. A float value in Modbus will be transmitted in Big Endian format (Motorola Format), that means most significant byte is transmitted first. For saving received bytes in Modbus master it must be considered which architecture is used. Is Modbus Master is a Little Endian architecture, received frame needs to be swapped to corresponding memory addresses. If it is not saved in correct order it is possible that displayed value is useless. EN MRA4 Modbus 09/17 Page 7
8 Specific Modbus Function Codes Function Code 5: Query Slave address 5 Register address HI Register address LO Register data HI Register data LO Check-sum HI Check-sum LO Response Slave address 5 Register address HI Register address LO Register data HI Register data LO Check-sum HI Check-sum LO Register address (HI*256 + LO) Data word address to be written Register data Value of the data word to be written (Highbyte and Lowbyte). Permitted value range : FF00 hex request for a single bit to be on: This often means to reset a counter, execute acknowledgments or set blockings signals hex request for a single bit to be off: This often means to deactivate blocking signals or to reset single bits. Function Code 8: Query Slave address 8 Data Diag Code HI 0x00 Data Diag Code LO 0x00 Test data Test data Check-sum HI Check-sum LO Response Slave address 8 Data Diag Code HI Data Diag Code LO Test data Test data Check-sum HI Check-sum LO Data Diag Code HI (high), Data Diag Code LO ( Low) Diagnostic Code (subfunction code of function code 8) for testing the communication system. The Diagnostic Code Return Query Data (0x00, 0x00) is being supported. Test Data By using the Diagnostic Code 0x00 0x00, the transmitted data is sent back to the Master unchanged. Page 8 EN MRA4 Modbus 09/17
9 Specific Modbus Function Codes Function Code 16: Query Slave address 16 Register address HI Register address LO Register number HI Register number LO Byte number Register 0 HI Register 0 LO... Check-sum HI Check-sum LO Response Slave address 16 Register address HI Register address LO Register number HI Register number LO Check-sum HI Check-sum LO Register address (HI*256 + LO) Data word address as from where writing should start. Register number (HI*256 + LO) Query: Number of data words to be written. Valid range: Response: Number of data words written. Byte number Number of subsequent Bytes to contain data words. Register Data words read out of the device (Highbyte und Lowbyte). EN MRA4 Modbus 09/17 Page 9
10 Specific Modbus Function Codes Setting Date and Time Date and time can be set by means of function code 16 and read with function code 3. If the device address 0 (broadcast address) is selected, the times of all devices connected to this bus are simultaneously reset. The devices do not respond to a broadcast command. Page 10 EN MRA4 Modbus 09/17
11 Specific Modbus Function Codes Supported MODBUS- Error Messages Exception Response Telegrams are described within the general Modbus Application Protocol Specification". An exception response table with examples is shown there. The table below contains just the actually used codes. In case the device has recognized an error it will react in the following way: Exception Designation Code 1 Illegal Function The message received includes a function code which is not supported by the Slave. 2 Illegal Data Access was sought on a data word address not included in the data module. 3 Illegal Data Value The received message contains an invalid data structure (e.g. wrong number of data bytes). 4 Slave Device Failure An unrecoverable error occurred while the server (or slave) was attempting to perform the requested action. The response given by the device in a failure case has the following format: Slave 0x80 + Function Code Exception Code Checksum HI Checksum LO In the second Byte of the response the Function Code is sent with the highest Bit set to 1. This is equivalent to an addition by 0x80. The third Byte holds the Exception Code of the error message. EN MRA4 Modbus 09/17 Page 11
12 Appendix - Data Point Lists Signals AR Struct active Bit 0x1 ExBlo Bit 0x2 running Bit 0x8 t-dead Bit 0x10 successful (*) Bit 0x100 failed (*) Bit 0x200 t-ar Supervision Bit 0x1000 AR Struct ExBlo1-I Bit 0x1 (10) (13) - Signal: active - Signal: External Blocking - Signal: Auto Reclosing running - Signal: Dead time between trip and reclosure attempt - Signal: Auto Reclosing successful - Signal: Auto Reclosing failure - Signal: AR Supervision - input state: External blocking1 Page 12 EN MRA4 Modbus 09/17
13 ExBlo2-I Bit 0x2 CB ON Cmd Bit 0x10 Pre Shot (*) Bit 0x20 Shot 1 (*) Bit 0x40 Shot 2 (*) Bit 0x80 Shot 3 (*) Bit 0x100 Shot 4 (*) Bit 0x200 Shot 5 (*) Bit 0x400 Shot 6 (*) Bit 0x800 AR Struct Ex Lock-I Bit 0x1 (10) (11) (12) - input state: External blocking2 - Signal: CB switch ON Command - Pre Shot Control - Shot Control - Shot Control - Shot Control - Shot Control - Shot Control - Shot Control - input state: External AR lockout. EN MRA4 Modbus 09/17 Page 13
14 Ex Shot Inc-I Bit 0x2 Blo Bit 0x4 t-blo after CB man ON Bit 0x8 Lock Bit 0x10 t-reset Lockout Bit 0x20 Ready Bit 0x40 - input state: The AR Shot counter will be incremented by this external Signal. This can be used for Zone Coordination (of upstream Auto Reclosure devices). Note: This parameter enables the functionality only. The assignment has to be set within the global parameters. - Signal: Auto Reclosure is blocked - Signal: AR blocked after circuit breaker was switched on manually. This timer will be started if the circuit breaker was switched on manually. While this timer is running, AR cannot be started. - Signal: Auto Reclosure is locked out - Signal: Delay Timer for resetting the AR lockout. The reset of the AR lockout state will be delayed for this time, after the reset signal (e.g digital input or Scada) has been detected. - Signal: Ready to shoot Page 14 EN MRA4 Modbus 09/17
15 t-run2ready Bit 0x80 Standby Bit 0x100 Service Alarm 1 Service Alarm 2 Max Shots / h exceeded Bit 0x Bit 0x Bit 0x800 BO Slot X Struct BO Bit 0x1 BO Bit 0x2 BO Bit 0x4 BO Bit 0x8 (10) (11) (12) - Signal: Examination Time: If the Circuit Breaker remains after a reclosure attempt for the duration of this timer in the Closed position, the AR has been successful and the AR module returns into the ready state. - Signal: Standby - Signal: AR - Service Alarm 1, too many switching operations - Signal: AR - Service Alarm 2 - too many switching operations - Signal: The maximum allowed number of shots per hour has been exceeded. - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: Binary Output Relay EN MRA4 Modbus 09/17 Page 15
16 BO Bit 0x10 BO Bit 0x20 DISARMED! Bit 0x40 Outs forced Bit 0x80 BO Slot X Struct BO Bit 0x1 BO Bit 0x2 BO Bit 0x4 BO Bit 0x8 - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: CAUTION! RELAYS DISARMED in order to safely perform maintenance while eliminating the risk of taking an entire process off-line. (Note: The Self Supervision Contact cannot be disarmed). YOU MUST ENSURE that the relays are ARMED AGAIN after maintenance - Signal: The State of at least one Relay Output has been set by force. That means that the state of at least one Relay is forced and hence does not show the state of the assigned signals. - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: Binary Output Relay Page 16 EN MRA4 Modbus 09/17
17 BO Bit 0x10 BO Bit 0x20 DISARMED! Bit 0x40 Outs forced Bit 0x80 CBF - 50BF, 62BF Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 active Bit 0x4 ExBlo Bit 0x8 - Signal: Binary Output Relay - Signal: Binary Output Relay - Signal: CAUTION! RELAYS DISARMED in order to safely perform maintenance while eliminating the risk of taking an entire process off-line. (Note: The Self Supervision Contact cannot be disarmed). YOU MUST ENSURE that the relays are ARMED AGAIN after maintenance - Signal: The State of at least one Relay Output has been set by force. That means that the state of at least one Relay is forced and hence does not show the state of the assigned signals. - input state: External blocking1 - input state: External blocking2 - Signal: active - Signal: External Blocking EN MRA4 Modbus 09/17 Page 17
18 Trigger1-I Bit 0x10 Trigger2-I Bit 0x20 Trigger3-I Bit 0x40 running Bit 0x80 Alarm (*) Bit 0x100 Lockout (*) Bit 0x200 Waiting for Trigger (*) Bit 0x400 CLPU Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 Ex rev Interl-I Bit 0x4 active Bit 0x8 (10) (11) - Input: Trigger that will start the CBF - Input: Trigger that will start the CBF - Input: Trigger that will start the CBF - Signal: CBF- started - Signal: Circuit Breaker Failure - Signal: Lockout - Waiting for Trigger - input state: External blocking - input state: External blocking - input state: External reverse interlocking - Signal: active Page 18 EN MRA4 Modbus 09/17
19 ExBlo Bit 0x10 Ex rev Interl Bit 0x20 enabled Bit 0x200 detected (*) Bit 0x400 I< Bit 0x800 AR Blo Bit 0x1000 Load Inrush Bit 0x2000 Settle Time Bit 0x4000 CTS - 60L Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 active Bit 0x4 (10) (11) (12) (13) (14) (15) - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Cold Load enabled - Signal: Cold Load detected - Signal: No Load Current. - Signal: Blocked by AR - Signal: Load Inrush - Signal: Settle Time - input state: External blocking1 - input state: External blocking2 - Signal: active EN MRA4 Modbus 09/17 Page 19
20 ExBlo Bit 0x8 Alarm Bit 0x10 Ctrl Struct Local Bit 0x1 Remote Bit 0x2 NonInterl Bit 0x4 SG Disturb Bit 0x8 SG Indeterm Bit 0x10 DI Slot X Struct DI Bit 0x1 DI Bit 0x2 DI Bit 0x4 - Signal: External Blocking - Signal: Alarm Current Transformer Measuring Circuit Supervision - Switching Authority: Local - Switching Authority: Remote - Non-Interlocking is active - Minimum one Switchgear is disturbed. - Minimum one Switchgear is moving (Position cannot be determined). - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input Page 20 EN MRA4 Modbus 09/17
21 DI Bit 0x8 DI Bit 0x10 DI Bit 0x20 DI Bit 0x40 DI Bit 0x80 DI Slot X Struct DI Bit 0x1 DI Bit 0x2 DI Bit 0x4 DI Bit 0x8 DI Bit 0x10 DI Bit 0x20 - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input - Signal: Digital Input EN MRA4 Modbus 09/17 Page 21
22 DI Bit 0x40 DI Bit 0x80 ExP[1] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Alarm-I Bit 0x8 Trip-I Bit 0x10 active Bit 0x20 ExBlo Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 - Signal: Digital Input - Signal: Digital Input - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: Alarm - input state: Trip - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command Page 22 EN MRA4 Modbus 09/17
23 Alarm Bit 0x200 Trip (*) Bit 0x400 TripCmd (*) Bit 0x800 ExP[2] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Alarm-I Bit 0x8 Trip-I Bit 0x10 active Bit 0x20 ExBlo Bit 0x40 Blo TripCmd Bit 0x80 (10) (11) (12) - Signal: Alarm - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: Alarm - input state: Trip - Signal: active - Signal: External Blocking - Signal: Trip Command blocked EN MRA4 Modbus 09/17 Page 23
24 ExBlo TripCmd Bit 0x100 Alarm Bit 0x200 Trip (*) Bit 0x400 TripCmd (*) Bit 0x800 ExP[3] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Alarm-I Bit 0x8 Trip-I Bit 0x10 active Bit 0x20 ExBlo Bit 0x40 (10) (11) (12) - Signal: External Blocking of the Trip Command - Signal: Alarm - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: Alarm - input state: Trip - Signal: active - Signal: External Blocking Page 24 EN MRA4 Modbus 09/17
25 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 Alarm Bit 0x200 Trip (*) Bit 0x400 TripCmd (*) Bit 0x800 ExP[4] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Alarm-I Bit 0x8 Trip-I Bit 0x10 active Bit 0x20 (10) (11) (12) - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Alarm - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: Alarm - input state: Trip - Signal: active EN MRA4 Modbus 09/17 Page 25
26 ExBlo Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 Alarm Bit 0x200 Trip (*) Bit 0x400 TripCmd (*) Bit 0x800 Fast Status Register Struct (10) (11) (12) - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Alarm - Signal: Trip - Signal: Trip Command Page 26 EN MRA4 Modbus 09/17
27 Device Type Bit 0xffff - Device Type: Device type code for relationship between device name and its Modbus code. Fast Status Register Struct Comm Version Bit 0xffff Fast Status Register Struct Config Bin Inp1-I Bit 0x1 Woodward: MRI MRU MRA MCA MRDT MCDTV MCDGV MRM MRMV MCDLV Modbus Communication version. This version number changes if something becomes incompatible between different Modbus releases. - State of the module input: Config Bin Inp EN MRA4 Modbus 09/17 Page 27
28 Config Bin Inp2-I Bit 0x2 - State of the module input: Config Bin Inp Config Bin Inp3-I Bit 0x4 - State of the module input: Config Bin Inp Config Bin Inp4-I Bit 0x8 - State of the module input: Config Bin Inp Config Bin Inp5-I Bit 0x10 - State of the module input: Config Bin Inp Config Bin Inp6-I Bit 0x20 - State of the module input: Config Bin Inp Config Bin Inp7-I Bit 0x40 - State of the module input: Config Bin Inp Config Bin Inp8-I Bit 0x80 - State of the module input: Config Bin Inp Config Bin Inp9-I Bit 0x100 - State of the module input: Config Bin Inp Config Bin Inp10-I Bit 0x200 (10) - State of the module input: Config Bin Inp Config Bin Inp11-I Bit 0x400 (11) - State of the module input: Config Bin Inp Config Bin Inp12-I Bit 0x800 (12) - State of the module input: Config Bin Inp Page 28 EN MRA4 Modbus 09/17
29 Config Bin Inp13-I Config Bin Inp14-I Config Bin Inp15-I Config Bin Inp16-I Bit 0x Bit 0x Bit 0x Bit 0x8000 Fast Status Register Struct Config Bin Inp17-I Config Bin Inp18-I Config Bin Inp19-I Config Bin Inp20-I Config Bin Inp21-I Config Bin Inp22-I Config Bin Inp23-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x40 (13) (14) (15) (16) - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp EN MRA4 Modbus 09/17 Page 29
30 Config Bin Inp24-I Config Bin Inp25-I Config Bin Inp26-I Config Bin Inp27-I Config Bin Inp28-I Config Bin Inp29-I Config Bin Inp30-I Config Bin Inp31-I Config Bin Inp32-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x8000 Fast Status Register Struct (10) (11) (12) (13) (14) (15) (16) - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp - State of the module input: Config Bin Inp Page 30 EN MRA4 Modbus 09/17
31 Trip (*) Bit 0xffff I2>[1] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 active Bit 0x8 ExBlo Bit 0x10 Blo TripCmd Bit 0x20 ExBlo TripCmd Bit 0x40 - Initial reason of trip. It is transferred as an integer value in the MODBUS register 5004 and essentially corresponds to the Trip entry in the fault record, i. e. to the name of the protective module that tripped first. Look up the definition of these integer values (i. e. the mapping trip code number-->module name) in the Cause of Trip table within the SCADA documentation. - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command EN MRA4 Modbus 09/17 Page 31
32 Alarm Bit 0x80 Trip (*) Bit 0x100 TripCmd (*) Bit 0x200 I2>[2] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 active Bit 0x8 ExBlo Bit 0x10 Blo TripCmd Bit 0x20 ExBlo TripCmd Bit 0x40 Alarm Bit 0x80 (10) - Signal: Alarm Negative Sequence - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Alarm Negative Sequence Page 32 EN MRA4 Modbus 09/17
33 Trip (*) Bit 0x100 TripCmd (*) Bit 0x200 IG[1] - 50N, 51N Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 (10) - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command EN MRA4 Modbus 09/17 Page 33
34 IGH2 Blo Bit 0x200 Alarm Bit 0x400 Trip (*) Bit 0x800 TripCmd (*) Bit 0x1000 IG[2] - 50N, 51N Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 (10) (11) (12) (13) - Signal: blocked by an inrush - Signal: Alarm IG - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking Page 34 EN MRA4 Modbus 09/17
35 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IGH2 Blo Bit 0x200 Alarm Bit 0x400 Trip (*) Bit 0x800 TripCmd (*) Bit 0x1000 IG[3] - 50N, 51N Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 (10) (11) (12) (13) - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: blocked by an inrush - Signal: Alarm IG - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active EN MRA4 Modbus 09/17 Page 35
36 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IGH2 Blo Bit 0x200 Alarm Bit 0x400 Trip (*) Bit 0x800 TripCmd (*) Bit 0x1000 IG[4] - 50N, 51N Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 (10) (11) (12) (13) - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: blocked by an inrush - Signal: Alarm IG - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command Page 36 EN MRA4 Modbus 09/17
37 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IGH2 Blo Bit 0x200 Alarm Bit 0x400 Trip (*) Bit 0x800 TripCmd (*) Bit 0x1000 IH Struct ExBlo1-I Bit 0x1 (10) (11) (12) (13) - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: blocked by an inrush - Signal: Alarm IG - Signal: Trip - Signal: Trip Command - input state: External blocking1 EN MRA4 Modbus 09/17 Page 37
38 ExBlo2-I Bit 0x2 active Bit 0x4 ExBlo Bit 0x8 Blo L Bit 0x10 Blo L Bit 0x20 Blo L Bit 0x40 Blo IG meas Bit 0x80 3-ph Blo Bit 0x100 Blo IG calc Bit 0x200 IRIG-B Struct IRIG-B active Bit 0x1 (10) - input state: External blocking2 - Signal: active - Signal: External Blocking - Signal: Blocked L1 - Signal: Blocked L2 - Signal: Blocked L3 - Signal: Blocking of the ground (earth) protection module (measured ground current) - Signal: Inrush was detected in at least one phase - trip command blocked. - Signal: Blocking of the ground (earth) protection module (calculated ground current) - Signal: If there is no valid IRIG-B signal for 60 sec, IRIG-B is regarded as inactive. Page 38 EN MRA4 Modbus 09/17
39 High-Low Invert Bit 0x2 I[1] - 50, Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 - Signal: The High and Low signals of the IRIG-B are inverted. This does NOT mean that the wiring is faulty. If the wiring is faulty no IRIG-B signal will be detected. - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command EN MRA4 Modbus 09/17 Page 39
40 IH2 Blo Bit 0x200 I[1] - 50, Struct Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 I[2] - 50, Struct (10) - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command Page 40 EN MRA4 Modbus 09/17
41 ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IH2 Blo Bit 0x200 I[2] - 50, Struct Alarm L Bit 0x1 (10) - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 EN MRA4 Modbus 09/17 Page 41
42 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 I[3] - 50, Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command Page 42 EN MRA4 Modbus 09/17
43 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IH2 Blo Bit 0x200 I[3] - 50, Struct Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 (10) - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm EN MRA4 Modbus 09/17 Page 43
44 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 I[4] - 50, Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking Page 44 EN MRA4 Modbus 09/17
45 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IH2 Blo Bit 0x200 I[4] - 50, Struct Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 (10) - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 EN MRA4 Modbus 09/17 Page 45
46 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 I[5] - 50, Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command Page 46 EN MRA4 Modbus 09/17
47 IH2 Blo Bit 0x200 I[5] - 50, Struct Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 I[6] - 50, Struct (10) - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command EN MRA4 Modbus 09/17 Page 47
48 ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 Ex rev Interl-I Bit 0x8 active Bit 0x10 ExBlo Bit 0x20 Ex rev Interl Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 IH2 Blo Bit 0x200 I[6] - 50, Struct Alarm L Bit 0x1 (10) - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - input state: External reverse interlocking - Signal: active - Signal: External Blocking - Signal: External reverse Interlocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Blocking the trip command by an inrush - Signal: Alarm L1 Page 48 EN MRA4 Modbus 09/17
49 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 Intertripping Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command EN MRA4 Modbus 09/17 Page 49
50 Alarm-I Bit 0x8 Trip-I Bit 0x10 active Bit 0x20 ExBlo Bit 0x40 Blo TripCmd Bit 0x80 ExBlo TripCmd Bit 0x100 Alarm Bit 0x200 Trip (*) Bit 0x400 TripCmd (*) Bit 0x800 LOP Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 (10) (11) (12) - input state: Alarm - input state: Trip - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Alarm - Signal: Trip - Signal: Trip Command - input state: External blocking1 - input state: External blocking2 Page 50 EN MRA4 Modbus 09/17
51 active Bit 0x4 ExBlo Bit 0x8 LOP Blo Bit 0x10 Alarm Bit 0x20 Ex FF EVT Bit 0x1000 Ex FF VT Bit 0x2000 LOP Struct Ex FF EVT-I Bit 0x1 Ex FF VT-I Bit 0x2 Blo Trigger1-I Bit 0x4 Blo Trigger2-I Bit 0x8 (13) (14) - Signal: active - Signal: External Blocking - Signal: Loss of Potential blocks other elements. - Signal: Alarm Loss of Potential - Signal: Alarm Fuse Failure Earth Voltage Transformers - Signal: Ex FF VT - State of the module input: Alarm Fuse Failure Earth Voltage Transformers - State of the module input: Alarm Fuse Failure Voltage Transformers - State of the module input: An Alarm of this protective element will block the Loss of Potential Detection. - State of the module input: An Alarm of this protective element will block the Loss of Potential Detection. EN MRA4 Modbus 09/17 Page 51
52 Blo Trigger3-I Bit 0x10 Blo Trigger4-I Bit 0x20 Blo Trigger5-I Bit 0x40 LVRT[1] Struct ExBlo1-I Bit 0x1 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 active Bit 0x8 ExBlo Bit 0x10 Blo TripCmd Bit 0x20 ExBlo TripCmd Bit 0x40 LVRT[1] Struct - State of the module input: An Alarm of this protective element will block the Loss of Potential Detection. - State of the module input: An Alarm of this protective element will block the Loss of Potential Detection. - State of the module input: An Alarm of this protective element will block the Loss of Potential Detection. - input state: External blocking1 - input state: External blocking2 - input state: External Blocking of the Trip Command - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command Page 52 EN MRA4 Modbus 09/17
53 Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 t-lvrt is running (*) Bit 0x200 LVRT[2] Struct ExBlo1-I Bit 0x1 (10) - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm voltage stage - Signal: General Trip Phase L1 - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command - Signal: t-lvrt is running - input state: External blocking1 EN MRA4 Modbus 09/17 Page 53
54 ExBlo2-I Bit 0x2 ExBlo TripCmd-I Bit 0x4 active Bit 0x8 ExBlo Bit 0x10 Blo TripCmd Bit 0x20 ExBlo TripCmd Bit 0x40 LVRT[2] Struct Alarm L Bit 0x1 Alarm L Bit 0x2 Alarm L Bit 0x4 Alarm Bit 0x8 Trip L1 (*) Bit 0x10 - input state: External blocking2 - input state: External Blocking of the Trip Command - Signal: active - Signal: External Blocking - Signal: Trip Command blocked - Signal: External Blocking of the Trip Command - Signal: Alarm L1 - Signal: Alarm L2 - Signal: Alarm L3 - Signal: Alarm voltage stage - Signal: General Trip Phase L1 Page 54 EN MRA4 Modbus 09/17
55 Trip L2 (*) Bit 0x20 Trip L3 (*) Bit 0x40 Trip (*) Bit 0x80 TripCmd (*) Bit 0x100 t-lvrt is running (*) Bit 0x200 Logics Struct LE1.Gate Out Bit 0x1 LE1.Timer Out Bit 0x2 LE1.Out Bit 0x4 LE1.Out inverted Bit 0x8 LE1.Gate In1-I Bit 0x10 LE1.Gate In2-I Bit 0x20 (10) - Signal: General Trip Phase L2 - Signal: General Trip Phase L3 - Signal: Trip - Signal: Trip Command - Signal: t-lvrt is running - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal EN MRA4 Modbus 09/17 Page 55
56 LE1.Gate In3-I Bit 0x40 LE1.Gate In4-I Bit 0x80 LE1.Reset Latch-I Bit 0x100 Logics Struct LE2.Gate Out Bit 0x1 LE2.Timer Out Bit 0x2 LE2.Out Bit 0x4 LE2.Out inverted Bit 0x8 LE2.Gate In1-I Bit 0x10 LE2.Gate In2-I Bit 0x20 LE2.Gate In3-I Bit 0x40 LE2.Gate In4-I Bit 0x80 - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal Page 56 EN MRA4 Modbus 09/17
57 LE2.Reset Latch-I Bit 0x100 Logics Struct LE3.Gate Out Bit 0x1 LE3.Timer Out Bit 0x2 LE3.Out Bit 0x4 LE3.Out inverted Bit 0x8 LE3.Gate In1-I Bit 0x10 LE3.Gate In2-I Bit 0x20 LE3.Gate In3-I Bit 0x40 LE3.Gate In4-I Bit 0x80 LE3.Reset Latch-I Bit 0x100 Logics Struct - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching EN MRA4 Modbus 09/17 Page 57
58 LE4.Gate Out Bit 0x1 LE4.Timer Out Bit 0x2 LE4.Out Bit 0x4 LE4.Out inverted Bit 0x8 LE4.Gate In1-I Bit 0x10 LE4.Gate In2-I Bit 0x20 LE4.Gate In3-I Bit 0x40 LE4.Gate In4-I Bit 0x80 LE4.Reset Latch-I Bit 0x100 Logics Struct LE5.Gate Out Bit 0x1 LE5.Timer Out Bit 0x2 - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output Page 58 EN MRA4 Modbus 09/17
59 LE5.Out Bit 0x4 LE5.Out inverted Bit 0x8 LE5.Gate In1-I Bit 0x10 LE5.Gate In2-I Bit 0x20 LE5.Gate In3-I Bit 0x40 LE5.Gate In4-I Bit 0x80 LE5.Reset Latch-I Bit 0x100 Logics Struct LE6.Gate Out Bit 0x1 LE6.Timer Out Bit 0x2 LE6.Out Bit 0x4 LE6.Out inverted Bit 0x8 - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) EN MRA4 Modbus 09/17 Page 59
60 LE6.Gate In1-I Bit 0x10 LE6.Gate In2-I Bit 0x20 LE6.Gate In3-I Bit 0x40 LE6.Gate In4-I Bit 0x80 LE6.Reset Latch-I Bit 0x100 Logics Struct LE7.Gate Out Bit 0x1 LE7.Timer Out Bit 0x2 LE7.Out Bit 0x4 LE7.Out inverted Bit 0x8 LE7.Gate In1-I Bit 0x10 LE7.Gate In2-I Bit 0x20 - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal Page 60 EN MRA4 Modbus 09/17
61 LE7.Gate In3-I Bit 0x40 LE7.Gate In4-I Bit 0x80 LE7.Reset Latch-I Bit 0x100 Logics Struct LE8.Gate Out Bit 0x1 LE8.Timer Out Bit 0x2 LE8.Out Bit 0x4 LE8.Out inverted Bit 0x8 LE8.Gate In1-I Bit 0x10 LE8.Gate In2-I Bit 0x20 LE8.Gate In3-I Bit 0x40 LE8.Gate In4-I Bit 0x80 - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal EN MRA4 Modbus 09/17 Page 61
62 LE8.Reset Latch-I Bit 0x100 Logics Struct LE9.Gate Out Bit 0x1 LE9.Timer Out Bit 0x2 LE9.Out Bit 0x4 LE9.Out inverted Bit 0x8 LE9.Gate In1-I Bit 0x10 LE9.Gate In2-I Bit 0x20 LE9.Gate In3-I Bit 0x40 LE9.Gate In4-I Bit 0x80 LE9.Reset Latch-I Bit 0x100 Logics Struct - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching Page 62 EN MRA4 Modbus 09/17
63 LE10.Gate Out Bit 0x1 LE10.Timer Out Bit 0x2 LE10.Out Bit 0x4 LE10.Out inverted LE10.Gate In1- I LE10.Gate In2- I LE10.Gate In3- I LE10.Gate In4- I LE10.Reset Latch-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x100 Logics Struct LE11.Gate Out Bit 0x1 LE11.Timer Out Bit 0x2 - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output EN MRA4 Modbus 09/17 Page 63
64 LE11.Out Bit 0x4 LE11.Out inverted LE11.Gate In1- I LE11.Gate In2- I LE11.Gate In3- I LE11.Gate In4- I LE11.Reset Latch-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x100 Logics Struct LE12.Gate Out Bit 0x1 LE12.Timer Out Bit 0x2 LE12.Out Bit 0x4 LE12.Out inverted Bit 0x8 - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) Page 64 EN MRA4 Modbus 09/17
65 LE12.Gate In1- I LE12.Gate In2- I LE12.Gate In3- I LE12.Gate In4- I LE12.Reset Latch-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x100 Logics Struct LE13.Gate Out Bit 0x1 LE13.Timer Out Bit 0x2 LE13.Out Bit 0x4 LE13.Out inverted LE13.Gate In1- I LE13.Gate In2- I Bit 0x Bit 0x Bit 0x20 - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal EN MRA4 Modbus 09/17 Page 65
66 LE13.Gate In3- I LE13.Gate In4- I LE13.Reset Latch-I Bit 0x Bit 0x Bit 0x100 Logics Struct LE14.Gate Out Bit 0x1 LE14.Timer Out Bit 0x2 LE14.Out Bit 0x4 LE14.Out inverted LE14.Gate In1- I LE14.Gate In2- I LE14.Gate In3- I LE14.Gate In4- I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x80 - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal Page 66 EN MRA4 Modbus 09/17
67 LE14.Reset Latch-I Bit 0x100 Logics Struct LE15.Gate Out Bit 0x1 LE15.Timer Out Bit 0x2 LE15.Out Bit 0x4 LE15.Out inverted LE15.Gate In1- I LE15.Gate In2- I LE15.Gate In3- I LE15.Gate In4- I LE15.Reset Latch-I Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x Bit 0x100 Logics Struct - State of the module input: Reset Signal for the Latching - Signal: Output of the logic gate - Signal: Timer Output - Signal: Latched Output (Q) - Signal: Negated Latched Output (Q NOT) - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Assignment of the Input Signal - State of the module input: Reset Signal for the Latching EN MRA4 Modbus 09/17 Page 67
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